A file that reprograms a chip you can buy for about £30
Seconds to build.
Learning, prototyping, and most projects.
EnergyIR Forge
Describe the hardware. Get the files a factory builds from.
Forge puts one guided path over the professional tools that hardware design normally demands. The tools underneath are the genuine open-source ones. Forge runs them and reports what they actually did.
Open access
A browser, and nothing else.
No software to install, no expensive licences, and no need to know Verilog or KiCad before you start. Designing electronics normally means learning a dozen separate professional tools, each with its own file formats and decades of accumulated convention. Forge is one path over the top of them.
- Real toolsIndustry-standard open-source EDA, executed rather than simulated or approximated.
- Your filesEverything is a plain file in your project, downloadable as a zip.
- Checked resultsEvery status the interface asserts is produced by a gate that can fail.
Three routes
What you can make.
One description, three ways to turn it into something physical.
The blueprint a silicon foundry manufactures from
Minutes to build.
Custom silicon, research and teaching.
The circuit board that carries the chips and parts
Minutes to build.
Devices, products and IoT hardware.
Your first design
From a sentence to checked hardware code.
The first run takes about ten minutes, and most of that is reading what came back.
Describe it
Type what you want in plain language: an 8-bit counter, a traffic light controller, or a blinking LED with an adjustable rate.
Requirements
Forge turns the sentence into numbered statements of what the design must actually do.
Real code
It writes SystemVerilog implementing those requirements. This is genuine hardware code, not pseudocode.
Checked
A real tool checks the result. If it does not pass, it is not presented as though it did.
Keep talking
Refine by conversation: make it count down, add an enable input, reset to 1. Each message revises the design and re-runs the check.
The honesty system
Green has to mean something.
Anyone can build a tool that reports success. The value is in one whose green was earned, and that will tell you when it has not been.
A missing tool says so
If a toolchain is not installed on a deployment, Forge reports infrastructure-missing rather than routing around the gap. That is a statement about the environment, not a judgement on your design.
Every claim carries a fidelity level
Results say how they were produced, so a simulated figure is never mistaken for a measured one.
Badges are checked, not typed
“Validated” means an automated gate proved it. Several gates run at image-build time, so a false claim fails the deployment instead of shipping.
Timing and routing are gates
A design that misses timing fails. A partly-routed board is never presented as ready to manufacture.
Who it is for
Simplifying the hardware design process.
Students
A route from a sentence to a real design without first learning a dozen professional tools, and a manual that assumes no chip-design background.
Engineers
The genuine toolchain with the setup cost removed, plus an evidence trail that survives review.
Educators
Every step is inspectable, so the tool can be used to teach the process rather than hide it.
Get started
Describe something, and see what comes back.
Forge is open now. Start with an 8-bit counter and refine it by conversation from there.
Trust signals
Built for mission environmentsDesigned for radiation-aware computeBenchmark-backed architectureExport-control aware collaboration